Okay, I'm all for RISC-V, but this makes no sense, RISC-V isn't magically immune to spectre for no reason.
> No announced RISC-V silicon is susceptible, and the popular open-source RISC-V Rocket processor is unaffected as it does not perform memory accesses speculatively.
True but misleading. Rocket is an in-order chip. Not only it does not perform memory accesses speculatively, it does not speculate at all.
> No announced RISC-V silicon is susceptible
Wasn't the BOOM CPU (https://github.com/ucb-bar/riscv-boom) fabricated? It definitely seems vulnerable to Spectre.
This is a piece without substance since it basically says "Oh hey, competing chips actually selling to customers have some issues. We promise we'll be better when our lab designs finally end up in your hands. Trust and fund us now!" We'll see.
Anyone interested in what a better hardware/software-security architecture for RISC-V might look like should check out these exemplary projects:
CHERI already runs FreeBSD on a FPGA machine. I previously suggested merging Rocket with a version of CHERI as a start for that reason. Then, Draper is modifying or has modified RISC-V to use SAFE architecture. They're creating a brand around it as below.
So, that's what I've seen so far that addresses piles of vulnerabilities with a whole-system style of protection.
I’m wondering if the Mill would evade Spectre 1 and 2, have they said enough yet to speculate about that?
Is RISC-V vaporware? It’s on HN all the time but I never see where it is available for purchase.
They do have a point.
The more the complexity, the harder it is to keep software (or hardware, which for CPUs is defined as software) bug-free.
CISC simply has no place in the networked world, and RISC-V is the best RISC architecture.
Yeah. RISC-V is good.